Course |
Tools used |
Architectures |
WinDLX, Simplescalar toolset, Wattch, Cacti |
Software Compiler |
Flex (scanner generator), Bison (parser generator), SUIF (Stanford University Intermediate Format), Optimize and Parallelizing compilers |
Specification Language |
SystemC |
Microelectronics |
Microwind & DSCH |
Design Technologies |
ModelSim, VHDL, Synopsys Design Compiler, Power Compiler |
Low Power Design |
ModelSim, VHDL, Synopsys Design Compiler, Power Compiler |
Performance Evaluation |
Java Modelling Tool (JMT), modelling of computer and communication systems |
VLIW Architectures |
VEX (VLIW Examples) from HP Lab |
Embedded Processor |
LISA (Language for Instruction Set Architecture), Processor Modeling Language |
Retargetable Compilers |
LISA (Language for Instruction Set Architecture), Processor Modeling Language |
Reprogrammable Systems |
Linux, VHDL, ModelSim, Leonardo Spectrum, Quartus II, Altera FPGA Board |
Networking |
Linux, Eclipse, J2ME Midlet API |
RTOS & Scheduling |
Windriver & VxWorks |
Network-on-Chip |
A Network-on-Chip Simulator from NEC Lab |