Kuntal Roy


Assistant Professor
Electrical Engineering and Computer Science (EECS) Department
Room No. 302, Academic Building - 1/Infinity
Indian Institute of Science Education and Research (IISER) Bhopal
Bhopal Bypass Road, Bhauri
Bhopal - 462 066, Madhya Pradesh, INDIA
Email: kuntal@iiserb.ac.in

Academics

PostDoc [Electrical and Computer Engineering (ECE) Department, Purdue University, West Lafayette, Indiana, USA, May 2013 - August 2017]

Research: Device physics and operation of nanoelectronic devices particularly on spintronics and nanomagnetics for non-volatile memory/analog/digital computing in our future information processing systems. Analyzing experimental results and proposal of functional nanoelectronic devices (e.g., multiferroics, spin-devices).
Center: Function Accelerated nanoMaterial Engineering (FAME), one of six centers of STARnet, a SRC program sponsored by MARCO and DARPA, USA

PostDoc [Applied and Engineering Physics Department, Cornell University, Ithaca, New York, USA, October 2012 - April 2013]

Research: Switching dynamics in single-phase emerging multiferroic materials, energy dissipation in giant spin-Hall devices.

PhD [ECE Department, Virginia Commonwealth University, Richmond, Virginia, USA, Fall 2010 - Summer 2012]

Dissertation

Title: Hybrid spintronics and straintronics: An ultra-low energy computing paradigm
Overview: Multiferroic devices (a piezoelectric layer strain-coupled with a magnetostrictive nanomagnet) can be switched extremely energy efficiently, more so than any device currently extant, leading possibly to a new non-volatile spintronic logic and memory technology which might be an important contributor to Beyond Moore's Law technology.
News: Switching up spin, Nature, Aug. 25, 2011

Courses [GPA: 4.0/4.0]

PhD Student [ECE Department, Purdue University, West Lafayette, Indiana, USA, Fall 2008 - Summer 2010]

Passed PhD Qualifying Exam with ~90% marks, completed ECE course requirements with GPA: 4.0/4.0. performed research on design of Kalman filtering and low-cost poly-silicon solar cells, written a part of a successful NSF proposal, transferred to Virginia Commonwealth University and worked on spintronics.

Courses [GPA: 4.0/4.0]

Attended/Audited


MSc [Advanced Learning and Research Institute (ALaRI), Switzerland]

Thesis

Title: Sleep Transistor Techniques for Reducing Leakage in Nanometer Technologies
Key Terms: Analysis of Power Gating Structure, Active Leakage Power Reduction, MTCMOS Power Mode Transition Strategy.
Platform: Eldo SPICE, Synopsys Nanosim
Marks:10/10

Courses

Microelectronics, Low Power Design, Low Power Software, Design Technologies and Synthesis, Specification Languages, Architectures, VLIW Architectures, Future Trends in Microprocessor Architecture, Performance Evaluation, Software Compilers, Retargetable Compilers, Dependable Systems, Embedded Databases, Embedded Processor Design and Implementation, HW/SW Co-design, Networking, Reprogrammable Systems, RTOS and Scheduling, Validation and Verification, Cryptography, Network-on-Chip, Unified Modeling Language (UML), Management Introduction

Course Projects Courses & Tools/Languages

Course Tools used
Architectures WinDLX, Simplescalar toolset, Wattch, Cacti
Software Compiler Flex (scanner generator), Bison (parser generator), SUIF (Stanford University Intermediate Format), Optimize and Parallelizing compilers
Specification Language SystemC
Microelectronics Microwind & DSCH
Design Technologies ModelSim, VHDL, Synopsys Design Compiler, Power Compiler
Low Power Design ModelSim, VHDL, Synopsys Design Compiler, Power Compiler
Performance Evaluation Java Modelling Tool (JMT), modelling of computer and communication systems
VLIW Architectures VEX (VLIW Examples) from HP Lab
Embedded Processor LISA (Language for Instruction Set Architecture), Processor Modeling Language
Retargetable Compilers LISA (Language for Instruction Set Architecture), Processor Modeling Language
Reprogrammable Systems Linux, VHDL, ModelSim, Leonardo Spectrum, Quartus II, Altera FPGA Board
Networking Linux, Eclipse, J2ME Midlet API
RTOS & Scheduling Windriver & VxWorks
Network-on-Chip A Network-on-Chip Simulator from NEC Lab

** Almost all the courses are project based.


BE [Jadavpur University, India]

Project

Title: Experiments on Pioneer-2 Mobile Robots: Navigation and Co-ordination
Platform & Keywords: Linux OS, Activmedia Mobile Robot, Connection to Robots via BreezeNET wireless modem, C++ based software platforms, Saphira, Aria, Neural Networks, Kalman filtering, Path planning, Multi-agent co-ordination
Marks: HIghest Grade (Grade A)

Courses

Basic Physics and Math Courses, Basic Electronics, Numerical Methods, Computer Programming, Electron Devices, Material Science, Circuit Theory, Thermodynamics, Digital Logic, Network Theory, Discrete Electronic Circuits, Integrated Electronic Circuits, Electrical Machines, Electrical Measurements, Electromagnetic Theory, Antenna, Control Engineering, Communication Engineering, Tele-Communication, Digital Control Systems, Digital Signal Processing, Transmission Lines and Waveguides, Computer Organization and Architecture, Digital Communication, Microcompter Systems and Applications, Microwave Engineering, Radar Engineering, VLSI Circuits, Electronic Design Automation, Computer System Software, Business Administration


Teaching Assistantships


Training/Internship/Workshop


Other Activities

Developer of j4bib @ SourceForge in collaboration with Onur Derin: j4bib is a BibTeX parser written in Java using JLex and CUP. It provides a set of classes representing document object model of BibTeX. Conversion from/to BibTeX files to/from other DB formats is made possible and easy. Visit j4bib.